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Isomorphic Systems Laboratory

Building the Machines that Implement the Theory

Abstract


We develop edge neurocognitive systems that enforce structure ↔ function isomorphism (SFI) by design. Formal invariants derived from neurogeometric theory constrain learning dynamics and deployment across GPU/FPGA substrates, ensuring functional equivalence and geometric stability. The architecture integrates curvature-regularized learners that maintain smooth representational metrics and hybrid controllers that fuse symbolic and differentiable computation under identifiable latent manifolds. Each system includes PR-ready kernels enabling partial FPGA reconfiguration and swap-based adaptation, achieving ≤10 ms P99 latency, 10× faster update cycles, and 20–40% lower Expected Calibration Error (ECE) at iso-accuracy. Verification proceeds through: (1) ablations isolating curvature and hardware effects, (2) synthetic recovery validating identifiability, and (3) hardware-in-the-loop benchmarking of latency, calibration, and energy use. By embedding SFI as a design prior, the framework unifies neurocognitive theory with deployable computation, delivering measurable gains in stability, interpretability, and edge-scale performance.

INTRODUCTION

Problem.

AI systems drift from the theories they claim to implement. This breaks interpretability, identifiability, and transfer.

Objective.

Enforce structure↔function isomorphism (SFI) between cognitive models and deployed machines; deliver audited, on‑device performance.

Contributions.

  1. Formal SFI constraints for learning and control.
  2. FPGA partial reconfiguration (PR) templates for adaptive pipelines.
  3. Curvature‑regularized objectives with geometric guarantees.
  4. Hybrid/jump–diffusion state models with parameter recovery.

Scope.

Edge AI, neuromorphic‑style digital designs, and GPU/FPGA co‑design.

Primary targets: Jetson Orin Nano Super; ULX3S (ECP5) and Zynq‑class devices; optional NUC for orchestration.

Checks — Introduction

  • Assumptions: On‑device compute suffices for target tasks; geometric constraints reflect task‑relevant invariants; PR slots fit latency budgets.
  • Limits: Digital‑only prototypes; mixed‑signal excluded; dataset licensing limits external demos.
  • Testable predictions: SFI increases calibration, stability under covariate shift, and reduces update cost during domain transfer.

METHODS

1. Formalism

Let M_S = (S, g_S, T_S) be the structure manifold with metric g_S and transformation set T_S. Let M_F = (F, g_F, T_F) be the function manifold. An isomorphism ψ: M_S → M_F preserves a chosen set of invariants I (adjacency, curvature, symmetries, causal partial order).

  • Category view: A functor F: C_model → C_machine preserves identity and composition. Commutative squares define proof obligations per pipeline stage.
  • Objective: L = L_task + λ_iso · d_I( I(M_S), I(M_F) ) + λ_Ric · ∥Ric(M_S) − Ric(M_F)∥_2 + λ_stab · L_stab.
  • Hybrid models: piecewise‑smooth flows with guarded jumps. Before empirical claims, recover parameters θ on synthetic data to verify identifiability.

2. SFI Audit Protocol

  1. Invariant elicitation: enumerate I = {topological, geometric, algebraic, causal, temporal}.
  2. Contract derivation: map I to interface contracts (rates, precisions, ordering).
  3. Loss binding: attach penalties (d_I, curvature) to training.
  4. Compilation checks: ensure functorial mapping preserves I after quantization and scheduling.
  5. Runtime attestation: verify invariants on traces; reject if violated.
  6. Drift handling: PR swap or engine hot‑reload with post‑swap audit.

Checklist — SFI Audit

  • Assumptions: invariants capture task semantics; contracts are monitorable.
  • Limits: some invariants only estimable; approximate audits may pass false negatives.
  • Predictions: audit‑bound systems show smaller calibration drift and faster safe updates.

3. Invariant Library

  • Topological: degree/adjacency, cycles; penalty via graph edit distance or spectral gap matching.
  • Geometric: discrete Ricci proxies (Ollivier, Forman), geodesic distortion; penalties L_Ric, L_geo.
  • Algebraic: symmetry groups acting on inputs; penalty by equivariance error.
  • Causal/Temporal: partial order constraints; penalty by violation counts; runtime monitors via temporal logic.

4. Curvature Proxies (computable)

Graph G = (V, E).

  • Ollivier‑Ricci: κ(u,v) = 1 − W1(m_u, m_v) / d(u,v), with local measures on neighbors.
  • Forman‑Ricci: edge‑based combinatorial curvature; uses local degree and edge weights.
  • Mini‑batch estimators with cached neighborhoods keep cost bounded.

5. Architectures

  • GPU track (Orin): TensorRT INT8/FP16 engines; curvature regularization; policy controllers. Deterministic kernels where possible.
  • FPGA track (ULX3S/Zynq): streamed pipelines with PR regions; AXI interconnect; CDC FIFOs; bounded‑latency backpressure.
  • Coordinator: Rust for scheduling, logging, attestation; EDF with rate‑monotonic fallback.

7. Measurement Protocols

  • Latency: P50/P90/P99 with hardware timers; include capture→decision; exclude logging.
  • Throughput: sustained items/s at fixed power caps.
  • Energy: Joules/inference via INA219 or PMBus; report mean ± 95% CI.
  • Reliability: PR swap MTTR; watchdog interventions/hour.
  • Calibration: ECE/MCE; utility under shift; reliability diagrams.

Checks — Methods

  • Assumptions: functorial mapping approximates theory→machine relation; discrete curvature proxies align with model geometry.
  • Limits: on‑chip RAM bounds batch size; timing closure may constrain PR granularity.
  • Testable predictions: PR enables sub‑ms swaps; curvature penalties improve robustness without accuracy loss at equal compute.

Planned Results

Design

Each claim must pass Baseline + ≥2 Ablations, plus synthetic identifiability where hybrid/jump–diffusion is used.

Baseline (B)

Standard model without SFI penalties; no PR swaps; static pipeline.

Ablation‑1 (A1)

Remove (L_{iso}); keep (L_{Ric}).

Ablation‑2 (A2)

Remove (L_{Ric}); keep (L_{iso}).

Reported metrics

Accuracy, ECE, latency percentiles, power, throughput, Joules/inference, failure rate.

Identifiability test

Simulate hybrid system with known parameters θ*, recover θ via MLE/MAP; report bias, variance, and coverage.

Discussion

Interpretation.

SFI tightens the link between model semantics and machine behavior. Geometric penalties regularize dynamics. PR reconciles adaptability with uptime.

Threats to validity.

Metric selection errors; mis‑specification of invariants; PR timing closure risk.

Mitigations.

Invariant audits; sensitivity analyses across λ; formal properties on interfaces; slack budgeting in P&R.

Deployment.

On‑device analytics, privacy‑preserving inference, and deterministic fallbacks for safety.

Checks — Discussion

  • Assumptions: Invariance set I is sufficient; duty cycles respect thermal envelopes.
  • Limits: Commodity boards only; compliance varies by vertical.
  • Testable predictions: SFI variants transfer with fewer fine‑tuning steps and less catastrophic forgetting.

Posts

SYMBOL TABLE v1.1 (Notation‑Lock)

Diff note (v1.0→v1.1): added causal/temporal invariants; introduced κ_oll and Ric_F symbols; no removals.

  • ↔: structure↔function mapping operator.
  • M_S, M_F: structure manifold, function manifold.
  • g_S, g_F: metrics on M_S, M_F.
  • I(·): invariants (topological, geometric, algebraic, causal, temporal).
  • ψ: isomorphism M_S → M_F.
  • F: functor C_model → C_machine.
  • L_task, L_iso, L_Ric, L_stab: loss terms.
  • κ_oll, Ric_F: Ollivier and Forman discrete curvature proxies.
  • PR: partial reconfiguration.
  • ECE/MCE: calibration metrics.
  • θ: parameter vector in hybrid/jump–diffusion model.

ENGINEERING SPEC

(grounded in: DFX‑1, SEC‑1, FV‑1, TRT‑1)

Hardware targets: Jetson Orin Nano Super; ULX3S (ECP5‑85F); Zynq‑7000; Intel NUC.

Floorplanning and timing (DFX‑1)

  • PR regions aligned to AXI‑Stream slots; timing sign‑off at ≥10% slack.
  • CDC boundaries isolated by async FIFOs; SDC constraints reviewed.
  • Bitstreamsenable <10 ms swaps over SDIO.

Interfaces: AXI‑Stream/AXI‑Lite; SPI/I²C for sensors; gRPC over TLS for control; flatbuffers for logs.

Artifacts

  • tstreams, cocotb benches.
  • TensorRT engines with invariant hooks.
  • Rust coordinator crate with attestation and EDF scheduler.

Assurance: SymbiYosys proofs for safety properties; assume‑guarantee contracts per interface; reproducible builds; hash‑chained artifacts.

VALIDATION & COMPLIANCE

  • Identifiability: synthetic parameter recovery mandatory for any hybrid/jump–diffusion claim (ID‑1).
  • Ablations: ≥2 ablations + 1 baseline per change.
  • Reproducibility: seeds, versions, hardware hashes, SBOM.
  • Security/Privacy: secure boot where available; on‑device by default; encrypted control plane (SEC‑1).
  • Assumptions: sensor noise bounds; power and thermal budgets.
  • Justification: invariants selected per domain literature (GDL‑1, CURV‑1/2).

INDUSTRY COLLABORATION

Use‑case profiles

  • Industrial vision: 1080p@60fps inspection; P99 ≤8 ms; energy ≤0.3 J/inf; PR swap ≤20 ms between defect classes.
  • Mobile robotics: multi‑sensor fusion; deadline ≤10 ms; graceful degradation under fallback controller.
  • Privacy diagnostics: on‑device analysis; no cloud; audit trail and reproducible reports.

Engagement flow: 1) Scoping + invariant audit → 2) SOW with metrics/budgets → 3) Prototype → 4) HIL validation → 5) Deployment.

Deliverables: architecture doc, reproducible repo, bitstreams/engines, measurement report, client training.

DECISION LOG

Inclusions: SFI audit protocol; invariant library; curvature proxy definitions; floorplanning constraints; threat model; use‑case profiles; SBOM requirement.

Exclusions: mixed‑signal circuits; non‑auditable datasets; vendor‑locked toolchains where viable open options exist.

Merge rationale: page elevated from concept to spec with verifiable obligations and measurable targets; IMRaD spine preserved.

EVIDENCE MAP (labels → sources)

  • GDL‑1: Geometric deep learning foundations and invariances → Bronstein et al. 2021.
  • CURV‑1/2: Discrete Ricci curvature (Ollivier, Forman) and links to smooth limits.
  • CAL‑1: Calibration metrics ECE/MCE and temperature scaling.
  • STL‑1: Signal Temporal Logic monitors for runtime contracts.
  • DFX‑1: Xilinx/AMD Dynamic Function eXchange (partial reconfiguration) guide.
  • FV‑1: SymbiYosys formal flows for safety properties.
  • TB‑1: cocotb Python cosimulation testbenches.
  • TRT‑1: NVIDIA TensorRT developer documentation.
  • SEC‑1: NVIDIA Jetson Secure Boot chain of trust.
  • ID‑1: Identifiability of switching/hybrid dynamical systems.

REFERENCES (selected)

[GDL‑1] Bronstein MM, Bruna J, Cohen T, Veličković P. rioukov D. Ollivier curvature of random geometric graphs converges to Ricci curvature. 2020.
[STL‑1] Deshmukh JV, Donzé A, Seshia SA. Robust online monitoring of Signal Temporal Logic. STTT 2017.
[DFX‑1] AMD Xilinx. Vivado Design Suite User Guide: Dynamic Function eXchange (UG909). 2025.
[FV‑1] SymbiYosys Documentation.
[TB‑1] cocotb Documentation.
[TRT‑1] NVIDIA TensorRT Developer Guide.
[SEC‑1] NVIDIA Jetson Linux: Secure Boot.
[ID‑1] Balsells‑Rodas C, Wang Y, Li Y. On the Identifiability of Switching Dynamical Systems. 2023; Paoletti S et al. Identification of Hybrid Systems: A Tutorial. 2007.