Modern artificial intelligence has achieved remarkable success through specialization. By designing application-specific integrated circuits (ASICs) and leveraging graphics processing units (GPUs), we have created systems that excel at narrowly defined tasks. This hardware-software co-design has been a primary driver of progress. However, this success comes at a cost: profound rigidity. The very specialization that grants performance also locks computational structures into a fixed form, creating a brittle substrate that cannot adapt when task demands shift. This paper introduces a theoretical framework called Isomorphic Intelligence to address this rigidity bottleneck. The core thesis is that a truly adaptive system must be able to modify its own physical compute fabric in response to a changing environment. We propose a solution where a normative control objective—active inference is coupled with runtime hardware reconfiguration. This process is guided by principles from information geometry and regularized by graph curvature, realizing a system where the hardware’s structure and the agent’s function co-evolve to maintain a principled correspondence.

The Problem: When Optimal Architectures are Not Static

The dominant paradigm in computing, from von Neumann architectures to contemporary deep learning accelerators, is founded on a fixed substrate. Even advanced neuromorphic systems, which model brain-like computation to reduce energy consumption, largely rely on a static microarchitecture. For example, Intel’s Loihi chip provides an event-driven, memory-proximal processing fabric that achieves orders-of-magnitude efficiency gains but its underlying neuron and synapse topology is fixed at design time (Davies et al., 2018). This static design assumption is a critical limitation.

Real-world environments are non-stationary; the statistical structure of tasks changes over time. An architecture optimized for one regime may be inefficient or ineffective in another. This creates a fundamental mismatch between the geometry of a given problem and the fixed topology of the hardware designed to solve it. This concept is an extension of morphological computation, which is the principle that an organism’s physical form offloads and simplifies neural control (Pfeifer & Bongard, 2007; Hauser et al., 2012). Here, we generalize from body morphology to compute morphology. A fixed compute substrate is akin to a body that cannot grow or adapt its form to new physical challenges.

The Theory: Isomorphic Intelligence via Geometric Regularization

To overcome the static hardware constraint, we require a principled way for a system’s physical structure to adapt in lockstep with its functional learning. Our framework achieves this by integrating three core concepts: active inference as a global objective, information geometry as the language of learning, and graph curvature as a structural regularizer.

Foundational Principles: Active Inference and Information Geometry

The foundation of our approach is the free-energy principle, operationalized through active inference. This framework posits that any self-organizing system, from a single cell to a human brain, acts to minimize a variational bound on its model evidence, known as free energy (Friston, 2010). This provides a unified, first-principles objective for both perception (updating beliefs) and action (changing the world).

Learning, under this view, can be described as motion on a statistical manifold—a space where each point represents a probabilistic model of the world. Information geometry provides the mathematical tools, including the metric and connections, for understanding and navigating this manifold in a principled way (Amari, 2016).

Defining Isomorphic Intelligence

Building on these foundations, we define Isomorphic Intelligence as a controller-substrate pair that maintains a structure-preserving correspondence between the geometry of a task and the geometry of the compute fabric. This is achieved by jointly updating the system’s functional parameters and its physical topology to minimize a global objective function under geometric regularization. The goal is not just to learn a task, but to physically embody a computational structure that reflects the task’s intrinsic structure.

The Control Objective: A Two-Timescale Optimization for Structure and Function

The core of our proposal is a unified control objective that balances task performance with structural integrity. This objective is minimized across two distinct timescales: fast updates for model parameters (θ) and slow updates for the hardware graph topology (G). The objective function is: min θ , G F VI ( θ | G ) + λ ⁢ Φ curv ( G )

Here, F_VI(θ | G) represents the variational free energy of the agent’s model, conditioned on the current hardware graph G. Minimizing this term drives task performance. The second term, Φ_curv(G), is a regularizer based on graph curvature, which promotes robust and efficient network topologies. The hyperparameter λ mediates the trade-off between immediate task performance and long-term structural integrity.

Evidence and Mechanisms: Proposed Implementation

This theoretical framework can be operationalized using commercially available reconfigurable hardware and established mathematical tools for network analysis. The implementation relies on a specific hardware stack, a well-defined geometric regularizer, and a stable control strategy.

The Hardware Stack: From FOSS Prototypes to Industrial Reconfiguration

We propose a phased implementation path. An initial system (v0) would pair an NVIDIA Jetson Orin Nano, providing high-performance inference capabilities, with a ULX3S FPGA board based on the Lattice ECP5. On this platform, reconfiguration is limited to warm-boot multiboot swaps, allowing the system to switch between entire pre-compiled hardware bitstreams.

A more advanced system (v1) would utilize AMD/Xilinx platforms that support Dynamic Function eXchange (DFX), a mature technology for partial runtime reconfiguration (AMD Xilinx, 2022). DFX allows specific regions of the FPGA to be reconfigured while the rest of the device remains operational. This has been successfully used to adapt hardware accelerators for changing computational demands in real-time streaming applications and multi-task neural network execution (Zhang et al., 2020).

The Regularizer: Using Graph Curvature to Guide Adaptation

To guide the reconfiguration of the compute graph $G$, we employ Ollivier-Ricci curvature. This concept from discrete geometry measures the “connectedness” of neighborhoods around an edge in a graph (Ollivier, 2009). High positive curvature indicates that two connected nodes share many neighbors, forming a cohesive, robust community. Negative curvature indicates that the nodes’ neighborhoods are diverging, typical of tree-like structures that bridge different communities. This metric has proven effective in identifying vulnerabilities and functional modules in complex networks like the internet (Ni et al., 2015).

Because calculating Ollivier-Ricci curvature can be computationally intensive, we propose using Forman-Ricci curvature as a fast, scalable surrogate for initial screening (Forman, 2003; Samal et al., 2018). The control loop can then use this information to target hardware changes: encouraging positive curvature in shared computational backbones to increase robustness, while allowing negative curvature in specialized processing pipelines.

The Control Strategy for the $\lambda$ Trade-off

The balance between performance and structure, governed by λ, is critical. We propose a two-timescale adaptation strategy. An initial value, λ₀, can be determined offline using methods like Bayesian optimization or hypergradient-based bilevel optimization (Maclaurin et al., 2015; Snoek et al., 2012).

Subsequently, λ can be adapted online on a slower timescale than the primary inference loop. The update rule can follow standard two-timescale stochastic approximation theory, ensuring stability and convergence (Borkar, 2008). This allows the system to learn the appropriate emphasis on structural integrity based on the dynamics of its environment. Safety bounds, such as constraints on the total reconfiguration budget or the maximum allowable drift in curvature, can be enforced to prevent catastrophic reorganizations.

Potential Objections and Mitigations

The proposed framework faces two primary feasibility challenges: the stability of its nested control loops and the computational cost of its geometric regularizer. Both challenges can be addressed through careful system design.

Feasibility Concern 1: Timescale Stability and Control Loop Latency

A system that modifies its own hardware at runtime risks instability. Our primary mitigation is a strict separation of timescales. The fast loop, running on the Orin module, executes real-time active inference for the immediate task, ensuring continuous, reactive control. The slow loop, which evaluates the utility of a hardware reconfiguration, operates on a much longer timescale. A reconfiguration is only proposed when the predicted performance gain surpasses a hysteresis threshold, a standard control technique to prevent rapid, oscillating “chattering” in switching systems (Khalil, 2002).

Feasibility Concern 2: The Computational Overhead of Curvature

Calculating Ollivier-Ricci curvature for a large, detailed graph of logic elements would be prohibitively expensive. We mitigate this cost through three mechanisms. First, the curvature calculation is performed on an abstracted, high-level graph representing inter-module connectivity, not individual gates. Second, the calculation is amortized over a time window, not performed at every control step. Third, we use the computationally cheaper Forman-Ricci curvature as a surrogate to screen for candidate reconfigurations, escalating to the more precise Ollivier-Ricci calculation only for the most promising edges or regions (Samal et al., 2018; Sreejith et al., 2017).

Synthesis: What is Novel in This Approach?

The Isomorphic Intelligence framework integrates existing technologies and theories into a novel synthesis with three primary contributions.

1. Closed Loop from Inference to Hardware: While prior neuromorphic systems adapt synaptic weights on a fixed fabric, our system closes the loop from a normative inference objective directly to the runtime modification of the hardware topology itself.
2. Geometric Regularization of Compute Graphs: We introduce graph curvature as a principled regularizer for the physical interconnects of a compute substrate. This moves beyond simple connectivity metrics to use a geometric indicator of robustness and community structure.
3. Morphogenetic Compute as an Engineering Principle: We operationalize the theory of morphological computation, extending it from biological bodies to the silicon substrate. The system aligns its own computational “shape” with the geometric demands of the task.

Implications: Towards Morphogenetic Engineering

The rigidity of the underlying substrate is a fundamental bottleneck to creating truly general and adaptive intelligence. A compute stack that can change its own shape under a principled objective expands the reachable policy class of an AI agent, allowing it to discover not only the right software but also the right hardware for a given problem. This aligns with the geometric theories of learning, which view intelligence as an emergent property of systems that build efficient internal models of their environment (Amari, 2016).

Future work will focus on the difficult problem of credit assignment between parameter updates ($\theta$) and topology changes ($G$), potentially using hypergradient or implicit differentiation techniques (Lorraine et al., 2020). Furthermore, developing robust methods to estimate the intrinsic geometry of a task—using tools like diffusion maps or persistent homology—is crucial for defining the target structure for the hardware to become isomorphic to (Coifman & Lafon, 2006; Carlsson, 2009).

Conclusion: From Rigid Circuits to Co-Evolving Systems

Isomorphic Intelligence provides a theoretical and practical roadmap for escaping the limitations of fixed-fabric computation. By combining a first-principles objective from active inference with the practical mechanism of reconfigurable hardware, all guided by the geometric language of graph curvature, we can design systems that co-evolve their function and their form. This approach marks a crucial step away from designing rigid, specialized circuits and towards engineering truly adaptive, morphogenetic computational systems.

End Matter

Assumptions

• The intrinsic geometric structure of a task is discoverable and can be meaningfully approximated.
• Graph curvature serves as a sufficient statistic for the desired structural properties of the compute fabric (e.g., robustness, modularity).
• The timescales of task environment changes and hardware reconfiguration are separable enough to permit stable two-timescale control.
• The performance gains from hardware isomorphism outweigh the energy and latency costs of runtime reconfiguration.

Limits

• The framework is currently limited by the granularity and latency of commercially available reconfigurable logic (DFX partitions or full bitstreams).
• It does not address adaptation at higher levels of abstraction, such as evolving the instruction set architecture or data types.
• The credit assignment problem—distinguishing gains from parameter updates versus topological changes—remains a significant research challenge.
• The current model focuses on a single agent-substrate pair and does not describe how multi-agent or distributed systems would co-evolve.

Testable Predictions

• A system implementing curvature-regularized DFX will demonstrate higher performance and energy efficiency on a non-stationary task benchmark compared to both a fixed-fabric FPGA equivalent and a GPU-based solution.
• The optimal value of the regularization parameter $\lambda$ will be inversely correlated with the rate of change in the task distribution; more stable environments will favor higher $\lambda$ (more stable structures).
• Ablating the curvature regularizer ($\lambda=0$) will lead to topologically fragmented or inefficient hardware graphs that exhibit lower fault tolerance.
• Graphs adapted for tasks with hierarchical structure will exhibit more negative Ollivier-Ricci curvature along critical paths compared to graphs adapted for highly integrated tasks.

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